\section{Result}
\label{sec:result}
When the task of creating the VHDL for the internal components and their connections were complete, the system was to be exported and run on the FPGA development card.

\subsection{Simulation} % (fold)
\label{sub:simulation}

\input{result/extended_testbench}
\input{result/running_the_extended_testbench}

\newpage

\subsection{FPGA programming}
\label{sub:fpga_programming}
The FPGA was programmed by following the steps explained in the tutorial part of the compendium. The main.c file had to be modified by inserting an include statement and three defines.

\begin{lstlisting}
#include "mips_processor.h"
#define WR MIPS_PROCESSOR_mWriteReg
#define RR MIPS_PROCESSOR_mReadReg
#define BASE 0xC3C00000 
\end{lstlisting}
 
\lstinputlisting{./code/dmem_in.txt}
\lstinputlisting{./code/imem_in.txt}

The test bench (see section \ref{extended_testbench}) that was used during simulation was then assembled into two txt files and used for testing the programmed FPGA together with the supplied python script.\\

\indent\texttt{python host.py -p 8 -i imem\_in.txt}\\
\indent\texttt{python host.py -p 8 -d dmem\_in.txt}\\
\indent\texttt{python host.py -p 8 -c s}\\
\indent\texttt{python host.py -p 8 -c s}\\
\indent\texttt{python host.py -p 8 -r dmem\_out.txt}\\

The result of the data memory after the execution of the program was then written to file.
\lstinputlisting{./code/dmem_out.txt}
